Activities

Member, IEEE, IEEE Electron Device Society (EDS) and IEEE Circuits and Systems Society (CASS), ACM Special Interest Group on Design Automation (SIGDA)

Technical Committee of Nanoelectronics and Gigascale systems,  IEEE Circuits and Systems Society 

PI’s Honors

  • ASU Fulton Outstanding Assistant Professor 2017
  • IEEE Transactions on VLSI Systems’ Best Reviewers 2017
  • NSF Faculty Early Career Development (CAREER) Award 2016
  • DoD- Air Force Research Lab (AFRL) Summer Faculty Fellowship 2016
  • DoD-Defense Threat Reduction Agency (DTRA) Young Investigator Award 2015
  • Qualcomm Fellowship for Telluride Neuromorphic Engineering Workshop 2013 (1 of 3 winners globally)
  • Chinese Government Scholarship for Outstanding Self-financed Students Studying Abroad 2012 (~500 selected Chinese students in all disciplines globally)
  • IEEE Electron Devices Society PhD Student Fellowship 2012 (1 of 3 winners globally)
  • IEEE Electron Devices Society Masters Student Fellowship 2010 (1 of 3 winners globally)
  • Stanford Graduate Fellowship (SGF) 2009-2012 (the highest graduate fellowship offered by Stanford University)
  • Innovation Award 2009, Peking University for significant contribution in research
  • Undergraduate Academic Star 2009, Peking University (top 10 undergraduate researchers of the university)
  • Outstanding Student Award 2009, Education Committee of Beijing, China (< 0.1% acceptance rate)

Technical Program Committee:

  • IEEE International Electron Devices Meeting (IEDM) 2017
  • ACM/IEEE Design Automation Conference (DAC) 2017
  • IEEE Symposium on Circuits and Systems (ISCAS) 2015-2017
  • ACM Great Lakes Symposium on VLSI (GLSVLSI) 2015-2016
  • IEEE International Conference on Computer Design (ICCD) 2017
  • MRS Electronic Materials Conference (EMC) 2015-2016
  • ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH) 2016-2017
  • IEEE Asian Hardware Oriented Security and Trust Symposium (AsianHOST) 2017
  • IEEE International Conference on Solid-State and Integrated Circuits Technology (ICSICT) 2016

Editorial Service:
Guest Editor, special issue on Nanoscale Hardware Security, Springer Journal of Hardware and System Security

Special Session/Workshop Organizer:

  • Tutorial on “Neuromorphic Computing with Emerging Synaptic Devices”, IEEE European Solid-State Device Research Conference (ESSDERC) 2017.
  • Symposium on “Materials, Devices and Architectures for Neuromorphic Engineering and Brain-Inspired Computing”, MRS Fall Meeting 2017.
  • Special session on “Device-Circuit-System Integration Using Emerging Transistors”, IEEE International Symposium on Circuits and Systems (ISCAS) 2016.
  • Special session on “Device-Circuit-System Integration Using Emerging Memory (Part-I and Part-II)”, IEEE International Symposium on Circuits and Systems (ISCAS) 2015.
  • Workshop on “Adaptive Learning On-a-Chip: Hardware and Algorithms (ALOHA)”, SIAM International Conference on Data Mining (SDM) 2015.
  • Special session on “3D Resistive Devices and CMOS Integration”, IEEE International Symposium on Circuits and Systems (ISCAS) 2014.

Short Courses/Tutorials:

  1. S. Yu, “Emerging Non-volatile Memory (NVM) based Computing System,” IEEE Electron Devices Technology and Manufacturing (EDTM) 2017, Toyama, Japan.
  2. S. Yu, “Neuro-inspired Computing using Resistive Synaptic Devices: Challenges and Prospects,” IEEE European Solid-State Device Research Conference (ESSDERC) 2017, Leuven, Belgium.

Invited Seminars:

  1. S. Yu, “Neuro-Inspired Computing with Emerging Non-Volatile Memory (NVM)”, Departmental ECE Colloquium, University of Minnesota, Minneapolis, MN, Nov. 2017.
  2. S. Yu, “Neuro-Inspired Computing with Emerging Non-Volatile Memory (NVM)”, Nanoscience and Nanotechnology Seminar Series, University of South California, Los Angeles, CA, Nov. 2017.
  3. S. Yu, “System-level Benchmark of Resistive Synaptic Device Characteristics for Neuro-inspired Computing,” 7th Stanford/IMEC RRAM Workshop, Leuven, Belgium, Sep. 2017.
  4. S. Yu, “Neuro-Inspired Computing with Emerging Non-Volatile Memory (NVM)”, IMEC, Leuven, Belgium, Sep. 2017.
  5. S. Yu, “Neuro-Inspired Computing with Emerging Non-Volatile Memory (NVM)”, ShanghaiTech Workshop on Emerging Devices, Circuits and Systems, Shanghai, China, Jul. 2017.
  6. S. Yu, “Neuro-Inspired Computing with Emerging Non-Volatile Memory (NVM)”, Computer Science Faculty Talk Series, Arizona State University, Tempe, AZ, Apr. 2017.
  7. S. Yu, “Binary Neural Network and Its Implementation with 16 Mb RRAM Macro Chip”, 5th Neuro Inspired Computational Elements (NICE) Workshop, IBM Almaden, San Jose, CA, Mar. 2017.
  8. S. Yu, “Resistive Switching Devices: From Memory to Neuro-Inspired Computing and Hardware Security”, Northwestern University, Evanston, IL, Feb. 2017.
  9. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing and Hardware Security”, University of Michigan, Ann Arbor, MI, Feb. 2017.
  10. S. Yu, “Neuro-Inspired Computing with Emerging Non-Volatile Memory (NVM)”, Qualcomm, San Diego, CA, Jan. 2017.
  11. S. Yu, “Recent Progress of Neuro-inspired Computing with Resistive Synaptic Devices”, Peking University, Beijing, China, Dec. 2016.
  12. S. Yu, “Recent Progress of Neuro-inspired Computing with Resistive Synaptic Devices”, South University of Science and Technology of China, Shenzhen, China, Dec. 2016.
  13. S. Yu, “Design and Experimental Characterization of RRAM based Physical Unclonable Function (PUF) for Hardware Security,” 6th Stanford/IMEC RRAM Workshop, Stanford, CA, Oct. 2016.
  14. S. Yu, “Impact of Non-Ideal Resistive Synaptic Device Behaviors on Neuromorphic System Performances,” 13th U.S.-Korea Forum on Nanotechnology, Seoul, Korea, Sep. 2016.
  15. S. Yu, “Scaling-up Resistive Synaptic Arrays for Neuro-inspired Computing: Challenges and Prospects,” Korea Institute of Science and Technology, Seoul, Korea, Sep. 2016.
  16. S. Yu, “Scaling-up Resistive Synaptic Arrays for Neuro-inspired Architecture: Challenges and Prospect”, ESSDERC-ESSCIRC Workshop on Technology and Architectures Development for Brain Inspired Integrated Circuits, Lausanne, Switzerland, Sep. 2016.
  17. S. Yu, “Scaling-up Synaptic Crossbar Array for Neuromorphic Computing: Challenges and Prospects,” IBM TJ Watson Research Center, Yorktown Heights, NY, Aug. 2016.
  18. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing and Hardware Security,” University of Massachusetts, Amherst, MA, Aug. 2016.
  19. S. Yu, “Scaling-up Synaptic Crossbar Array for Neuromorphic Computing: Challenges and Prospects,” Air Force Research Laboratory, Rome, NY, July 2016.
  20. S. Yu, “Scaling-up Resistive Synaptic Array for Neuromorphic Computing: Challenges and Prospects,” Cornell University, Ithaca, NY, July 2016.
  21. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing and Hardware Security,” Syracuse University, Syracuse, NY, July 2016.
  22. S. Yu, “Exploring Variability of Emerging Nano-Devices for Hardware Security: A Case Study of RRAM based PUF,” International Workshop on Hardware Security, Tsinghua University, Beijing, China, June 2016.
  23. S. Yu, “Exploring Variability of Emerging Nano-Devices for Hardware Security: A Case Study of RRAM based PUF,” Peking University, Beijing, China, June 2016.
  24. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing and Hardware Security,” Beihang University, Beijing, China, June 2016.
  25. S. Yu, “Neuro-inspired Computing using Resistive Memories”, Emerging Technologies on Communications, Microsystems, Optoelectronics, Sensors (ET-CMOS), Montreal, Canada, May 2016.
  26. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing and Hardware Security,” National Tsing-Hua University, Hsinchu, Taiwan, Apr. 2016.
  27. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing and Hardware Security,” National Chiao-Tung University, Hsinchu, Taiwan, Apr. 2016.
  28. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing and Hardware Security,” National Cheng-Kung University, Tainan, Taiwan, Apr. 2016.
  29. S. Yu, “Neuro-inspired Computing using Resistive Memories,” HP Labs, Palo Alto, CA, Mar. 2016.
  30. S. Yu, “Neuro-inspired Computing using Resistive Memories,” UC Berkeley, Berkeley, CA, Mar. 2016.
  31. S. Yu, “Neuro-inspired Computing using Resistive Memories,” Stanford University, Stanford, CA, Mar. 2016.
  32. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing,” Tsinghua University, Beijing, China, Dec. 2015.
  33. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing,” Peking University, Beijing, China, Dec. 2015.
  34. S. Yu, “Resistive Random Access Memory (RRAM)’s Applications for Neuro-inspired Computing and Hardware Security,” UT-Austin, TX, Nov. 2015.
  35. S. Yu, “Resistive Memories for Neuro-Inspired Computing: A Holistic View from Devices to Architectures,” 5th Stanford/IMEC RRAM Workshop, Leuven, Belgium, Sep 2015.
  36. S. Yu, “Resistive Random Access Memory (RRAM): Modeling, Radiation Harsh Environments, and Neuromorphic Applications,” Sandia National Laboratories, Albuquerque, NM, Aug. 2015.
  37. S. Yu, “Resistive Random Access Memory (RRAM): Mechanism, Modeling, 3D Integration, and Neuromorphic Applications,” Beihang University, Beijing, China, July 2015.
  38. S. Yu, “Resistive Random Access Memory (RRAM): Mechanism, Modeling, 3D Integration, Hardware Security, and Neuromorphic Applications,” Globalfoundries, San Jose, CA, June 2015.
  39. S. Yu, “Resistive Random Access Memory (RRAM): Mechanism, Modeling, 3D Integration, Hardware Security, and Neuromorphic Applications,” IBM Almaden Research Center, San Jose, CA, June 2015.
  40. S. Yu, “Resistive Random Access Memory (RRAM): Mechanism, Modeling, 3D Integration, Radiation Effects, and Neuromorphic Applications,” CEA-LETI, Grenoble, France, Mar 2015.
  41. S. Yu, “Resistive Random Access Memory (RRAM): Modeling, 3D Integration and Neuromorphic Applications,” Samsung, San Jose, USA, Nov 2014.
  42. S. Yu, “Resistive Random Access Memory (RRAM): A Tutorial,” Peking University, Beijing, China, May 2014.
  43. S. Yu, “Resistive Random Access Memory (RRAM): Modeling, 3D Integration and Neuromorphic Applications,” Tsinghua University, Beijing, China, May 2014.
  44. S. Yu, “Resistive Random Access Memory (RRAM): Modeling, 3D Integration and Neuromorphic Applications,” Institute of Microelectronics, Chinese Academy of Science, Beijing, China, May 2014.
  45. S. Yu, “Brain-inspired computing with synaptic devices,” Connection One Seminar, Arizona State University, Tempe, AZ, USA, Oct. 2013.
  46. S. Yu, “Resistive Switching Memory (RRAM): Modeling, Reliability Characterization and 3D Integration,” SanDisk, Milpitas, CA, Oct. 2013.
  47. S. Yu, “Resistive Switching Memory (RRAM): Modeling, Reliability Characterization and 3D Integration,” Rambus, Sunnyvale, CA, Oct. 2013.
  48. S. Yu, “Resistive Switching Memory (RRAM): Modeling, Reliability Characterization and 3D Integration,” Intermolecular, San Jose, CA, Oct. 2013.
  49. S. Yu, “Brain-inspired computing with synaptic devices,” Penn. State University, University Park, PA, USA, Oct. 2013.
  50. S. Yu, “Brain-inspired computing with synaptic devices,” University of Pittsburgh, Pittsburgh, PA, Oct. 2013.
  51. S. Yu, “Brain-inspired computing with synaptic devices,” Telluride Neuromorphic Engineering Workshop, Telluride, CO, Jul. 2013.
  52. S. Yu, “Emerging device technology for future computing paradigms,” Synopsys, Mountain View, CA, USA, May 2013.
  53. S. Yu, “Emerging device technology for future computing paradigms,” Rohm Semiconductor, Santa Clara, CA, USA, Apr. 2013.
  54. S. Yu, “Emerging device technology for future computing paradigms,” UCLA, Los Angeles, CA, USA, Apr. 2013.
  55. S. Yu, “Emerging device technology for future computing paradigms,” Penn. State University, University Park, PA, USA, Mar. 2013.
  56. “Emerging device technology for future computing paradigms,”, UC Berkeley, Berkeley, CA, USA, Mar. 2013.
  57. S. Yu, “Emerging device technology for future computing paradigms,” Princeton University, Princeton, NJ, USA, Mar. 2013.
  58. S. Yu, “Emerging device technology for future computing paradigms,” Arizona State University, Tempe, AZ, USA, Mar. 2013.
  59. S. Yu, “Emerging device technology for future computing paradigms,” MIT, Cambridge, MA, USA, Feb. 2013.
  60. S. Yu, “Emerging device technology for future computing paradigms,” Applied Materials,  Santa Clara, CA, USA, Feb. 2013.
  61. S. Yu, “Emerging device technology for future computing paradigms,” UC Riverside, Riverside, CA, USA, Feb. 2013.
  62. S. Yu, “Emerging device technology for future computing paradigms,” Altera, San Jose, CA, USA, Feb. 2013.
  63. S. Yu, D. Kuzum, and H.-S. P. Wong, “Bio-inspired neuromorphic computing with solid-state synaptic devices,” Physical Sciences Colloquium of IBM TJ Watson Research Center, Yorktown Heights, NY, USA, Sep. 2012.
  64. S. Yu, D. Kuzum, and H.-S. P. Wong, “Bio-inspired neuromorphic computing with solid-state synaptic devices,” IBM Research Workshop on Materials, Devices and Technologies for New Computation Paradigms, Zurich, Switzerland, Aug. 2012.
  65. S. Yu, X. Guan, and H.-S. P. Wong, “Metal oxide resistive switching memory (RRAM): physical mechanism and device modeling,” Micron Technology, San Jose, CA, USA, Nov. 2011.

Panelist:
S. Yu, “Device-architecture interactions in the context of brain inspired computing”, NSF Nano Grantees Conference 2017, Arlington, VA.

Guest Lectures

  1. Tsinghua University, 2-week short course on “Semiconductor Memory Technologies”, June 2016.
  2. ASU, EEE 598 “Nanofabrication and Characterization”, lecture on “RRAM Tutorial”, Apr. 2014.
  3. ASU, EEE 425 “Digital Systems and Circuits”, lecture on “Emerging Non-Volatile Memory”, Nov. 2013.
  4. ASU, CSE 520 “Computer Architecture II”, lecture on “Emerging Non-Volatile Memory”, Nov. 2013.
  5. Stanford, EE 309 “Semiconductor Memory Devices and Technology”, lecture on “Introduction to Emerging Memory and RRAM”, Oct. 2013.
  6. Penn. State University, CSE 578 “Advanced Topics in Computer Hardware Design“, lecture on “Emerging Non-Volatile Memory”, Oct. 2013.
  7. Stanford, EE 320 “Nanoelectronics”,  lecture on “Brain-inspired computing with synaptic devices”, June. 2013.

Reviewer:

  • Nature Materials
  • Nature Nanotechnology
  • Nano Letters
  • ACS Nano
  • Advanced Materials
  • Advanced Functional Materials
  • Nanoscale
  • Nanotechnology
  • Applied Physics Letters
  • Journal of Applied Physics
  • Proceedings of the IEEE
  • IEEE Electron Device Letters
  • IEEE Transactions on Electron Devices
  • IEEE Journal on Electron Devices Society
  • IEEE Transactions on Nanotechnology
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • IEEE Transactions on Very-Large-Scale-Systems
  • IEEE Transactions on Circuits and Systems I
  • IEEE Transactions on Multi-Scale Computing Systems
  • IEEE Transactions on Computers
  • IEEE Transactions on Information Forensics & Security
  • IEEE Journal on Emerging and Selected Topics in Circuits and Systems
  • ACM Journal on Emerging Technologies in Computing Systems
  • IBM Journal of Research and Development
  • Journal of Physics D: Applied Physics
  • Semiconductor Science and Technology
  • Electrochemical and Solid-State Letters
  • Journal of the Electrochemical Society
  • ECS Journal of Solid State Science and Technology
  • Thin Solid Films
  • Solid State Electronics
  • Journal of Vacuum Science and Technology: A
  • Applied Physics A
  • Journal of Computational Electronics
  • Scientific Report
  • Science Advances
  • Science China: Information Sciences
  • Frontiers in Neuroscience

Students’ Honors

  • Pai-Yu Chen, Taiwanese Government scholarships to study abroad (GSSA), 2015
  • Pai-Yu Chen, ASU University Graduate Fellowship (UGF), 2017
  • Pai-Yu Chen, Design Automation Conference (DAC) PhD Forum, 2017