Teaching

EEE 529: Semiconductor Memory Technologies and Systems 

Fall 2013, Fall 2014, Fall 2015, Fall 2016, Fall 2017

Course Description:

The functionality and performance of today’s computing systems are increasingly dependent on the characteristics of the memory sub-system. This course covers the memory sub-system from the device/circuit building blocks to the array architecture design. The concept of memory hierarchy is used as an outline through the whole course. The first part of the course discusses the mainstream semiconductor memory device technologies that enable various levels in the memory hierarchy, including SRAM, DRAM and FLASH technologies. Issues such as basic operation principles, device design considerations, and device scaling trend and peripheral circuitry will be addressed. In addition, emerging memory candidates that may have the potential to change the memory hierarchy are also introduced, e.g. STT-MRAM, PCRAM and RRAM. The second part of the course discusses the memory architecture across different levels in the memory hierarchy, including the cache design, main memory design, and solid-state drive (SSD) design.

Topics covered:

  1. SRAM
  2. DRAM
  3. FLASH
  4. Emerging memory, STT-MRAM, PCM, RRAM
  5. Cache
  6. Main memory
  7. SSD

Prerequisites

Digital circuit courses are required, e.g. EEE 425 Digital Systems and Circuits
Semiconductor device physics courses are required, e.g. EEE 436 -Fund of Solid-State Devices

 


EEE 731 Advanced MOS Devices

Fall 2015

Course description

The nano era has seen modern VLSI technologies become increasingly sensitive to structural details and fabrication techniques. While “technology scaling” continues as the strongest driver for technology advancement, it has evolved from traditional Dennard Scalling into a multi-dimensional concept that combines new materials, novel structures and different physical principles. Accordingly, this course will cover topics such as: advanced VLSI transistor design; future challenges of VLSI transistors; the implications for device electrical performance caused by fabrication technique, physical models for nanometer scale structures, control of electrical characteristics (threshold voltage, short channel effects, ballistic transport) in small structures; and alternative device structures for VLSI in the nano era.

Course outline

  • Overview of the semiconductor industry
  • MOSFET – MOS capacitor, MOSFET long channel behavior (a short review)
  • Si MOSFET device scaling, non-scaling factors
  • Reading the ITRS, industry trend
  • MOSFET electrostatics
    • Short-channel MOSFET
    • Channel length, scale length theory, minimum channel length
    • PDSOI, FDSOI, ultra-thin body SOI, double-gate, FinFET, multi-gate FET, gate-all-around (nanowire) FET
    • Threshold voltage, quantum effects
    • Non-uniform channel doping, halo, super-halo
  • MOSFET electrodynamics
    • Carrier mobility, velocity saturation
    • Scattering theory, ballistic transport
    • Virtual source model
    • Strain effects, alternative channel materials (Ge, III-V, CNT, graphene, 2D)
  • High field effects
    • Impact ionization and breakdown, band-to-band tunneling, tunneling into gate dielectrics, hot carriers, dielectric degradation mechanisms
    • Tunneling FET
  • Parasitic elements
    • Series resistance, parasitic capacitance
    • Interconnect R and C, interconnect scaling
  • CMOS performance factors
    • CMOS circuit elements, propagation delay, delay metrics, power dissipation
    • Device pitch scaling
    • Device design tradeoff, energy-delay optimization

Prerequisite

Undergraduate-level solid state or semiconductor devices required (EEE436, or EEE531). Students should be familiar with the physical principles and operation of p-n junctions, MOS capacitors and long-channel MOSFETs.

Textbook:

    • Y. Taur & T. H. Ning, “Fundamentals of Modern VLSI Devices,” 2nd Edition, Publisher: Cambridge University Press, 2009

EEE 335: Analog and Digital Circuits

Spring 2014, Spring 2015, Spring 2016, Spring 2017

Course Description:

Analog, digital microelectronic circuits and systems, amplifiers, frequency response, gate sizing, timing analysis, sequential digital circuits.

Topics covered:

  1. MOSFET overview
  2. Digital circuits: inverter, logic circuits
  3. Memory circuits: SRAM, DRAM
  4. Single-stage amplifier basics
  5. High frequency response analysis
  6. Common source, common gate, source follower, cascode, differential amplifiers

Prerequisites

EEE 334 Circuits II

Textbook:

  1. A.S. Sedra and K.C. Smith, Microelectronic Circuits, 6th Edition, Publiser: Oxford University Press, 2009.