Efficient, Secure and Intelligent Computing (ESIC) Laboratory

Dr. Deliang Fan is an Associate Professor at School of Electrical Computer and Energy Engineering (ECEE), Arizona State University (ASU), Tempe, AZ.

Dr. Fan is the director of the Efficient, Secure and Intelligent Computing (ESIC) Laboratory.

Please check the Research and Publication tabs for details of ESIC research lab.

Dr. Fan’s Google scholar page and dblp page

Research Areas:

Multiple Research Assistant Positions Available:

we welcome all levels of students to apply (undergraduate/ master/ PhD students). please send your CV to [email protected] if interested (even you already applied in our ASU PHD system, I recommend to send your CV directly to my email). Our recruiting areas are VLSI circuit and chip design for In-memory computing, AI accelerator, on-device learning, etc. Another areas are efficient on-device learning algorithm co-design, AI Security. Multiple positions in those areas. please reach out to me if you are interested.

Call for Papers:

Dr. Fan is the editor of special issue ‘In-Memory Computing (IMC): From Technology to Applications’ from IEEE IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS. Please see the Call for Papers and submit your related research papers

Academic Awards of Dr. Fan:

Biography

Dr. Deliang Fan is currently an Associate Professor in the School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, AZ, USA. He received his M.S. and Ph.D. degrees in Electrical and Computer Engineering from Purdue University, West Lafayette, IN, USA, in 2012 and 2015, respectively. Dr. Fan’s primary research interests include AI Hardware, Digital Chip Design, Efficient AI algorithm, In-Memory Computing Circuits and Architecture, Adversarial and Trustworthy AI System. Dr. Fan has authored 180+ peer-reviewed international journal/conference research papers. He is the receipt of National Science Foundation Career Award, best paper award of 2019 ACM Great Lakes Symposium on VLSI, 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), and 2017 IEEE ISVLSI, best IP paper award of 2022 Design Automation and Test in Europe (DATE). His research works were also nominated as best paper candidate 2021 Design Automation Conference (DAC), 2019 Asia and South Pacific Design Automation Conference (ASPDAC) and 2019 International Symposium on Quality Electronic Design (ISQED). He is also the TPC Co-Chair of ISQED 2023-2025, chair of iMACAW@DAC 2022-2025, technical area chair of DAC 2021/2025, GLSVLSI 2019-2022, ISQED 2019-2022, and the financial chair of ISVLSI 2019. He served as technical reviewers for over 30+ international journals/conferences, such as Nature Electronics, IEEE TNNLS, TVLSI, TCAD, TNANO, TC, TCAS, etc. He also served as the Technical Program Committee member of DAC, ICCAD, HPCA, MICRO, WACV, GLSVLSI, ISVLSI, ASP-DAC, etc. Please refer to his research website for more details: https://faculty.engineering.asu.edu/dfan/

Education