{"id":111,"date":"2022-09-05T19:53:01","date_gmt":"2022-09-06T02:53:01","guid":{"rendered":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/?page_id=111"},"modified":"2025-08-04T11:41:48","modified_gmt":"2025-08-04T18:41:48","slug":"publications","status":"publish","type":"page","link":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"\n

Book chapters<\/h3>\n\n\n\n
    \n
  1. V. A. Chhabria and S. S. Sapatnekar, “Deep Learning for Analyzing Power Delivery Networks and Thermal Networks<\/a>,” in Machine Learning Applications in Electronic Design Automation, J. Hu and H. Ren, eds., Springer, New York, NY, 2023.<\/li>\n<\/ol>\n\n\n\n

    Journals<\/h3>\n\n\n\n
      \n
    1. [TODAES’25]<\/strong> M. A. A. Shohel, V. A. Chhabria, N. Evmorfopoulos, and S. S. Sapatnekar, “An Analytical Solution for Transient Electromigration Stress in Multisegment Straight-line Interconnects Based on a Stress-wave Model<\/a>,” in the ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025.<\/li>\n\n\n\n
    2. [TCAD’25] <\/strong>Z. Wang, P. S. Nalla, J. Sun, A. A. Goksoy, S. K. Mandal, J.-S. Seo, V. A. Chhabria, J.Zhang, C. Chakrabarti, U. Y. Ogras, and Y. Cao, “HISIM: Analytical Performance Modeling and Design Space Exploration of 2.5D\/3D Integration for AI Computing<\/a>,” in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025. <\/li>\n\n\n\n
    3. [TODAES’23]<\/strong> V. A. Chhabria, W. Jiang, A. B. Kahng, and S. S. Sapatnekar, “A Machine Learning Approach to Improving Timing Consistency between Global Route and Detailed Route,<\/a>” in the ACM Transactions on Design Automation of Electronic Systems (TODAES), 2023.<\/li>\n\n\n\n
    4. [TODAES’22]<\/strong> V. A. Chhabria, V. Ahuja, A. Prabhu, N. Patil, P. Jain, and S. S. Sapatnekar, “Encoder-Decoder Networks for Analyzing Thermal and Power Delivery Networks,<\/a>” in the ACM Transactions on Design Automation of Electronic Systems (TODAES), 2022.<\/li>\n\n\n\n
    5. [TCAD’21]<\/strong> V. A. Chhabria and S. S. Sapatnekar, “<\/a>OpeNPDN: A Neural-network-based Framework for Power Delivery Network Synthesis,<\/a>“<\/a> in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021.<\/li>\n<\/ol>\n\n\n\n

      Conferences<\/h3>\n\n\n\n
        \n
      1. [GLSVLSI’25]<\/strong> J. Hu, C. C. Sudarshan, M. Clifford, V. A. Chhabria, and A. Arora, “CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUs<\/a>,” Proceedings of the Great Lakes Symposium on VLSI (GLSVLSI), 2025.<\/li>\n\n\n\n
      2. [ICLAD’25] <\/strong>B.-Y. Wu, U. Sharma, A. Rovinski, and V. A. Chhabria, “OpenROAD Agent: An Intelligent Self-Correcting Script Generator for OpenROAD,” Proceedings of IEEE International Conference on LLM-Aided Design (ICLAD), 2025. <\/li>\n\n\n\n
      3. [ISPD’25]<\/strong> V. A. Chhabria, J. Hu, A. B. Kahng, and S. S. Sapatnekar, “Invited: Toward an ML EDA Commons: Establishing Standards, Accessibility, and Reproducibility in ML-driven EDA Research<\/a>,” Proceedings of International Symposium on Physical Design (ISPD), 2025.<\/li>\n\n\n\n
      4. [IGSC’24<\/strong>] C. C. Sudarshan, Aman Arora, and V. A. Chhabria, “Beyond the Surface: The Necessity for Detailed Metrics in Corporate Sustainability Reports<\/a>,\u201d Proceedings of International Green and Sustainable Computing Conference (IGSC), 2024.<\/li>\n\n\n\n
      5. [ICCAD’24<\/strong>] N. Karmokar, S.-W. Tam, T. V. Dinh, V. A. Chhabria, R. Harjani, and S. S. Sapatnekar, \u201cAnalyzing the Impact of FinFET Self-Heating on the Performance of RF Power Amplifiers<\/a>,\u201d Proceedings of IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), 2024<\/li>\n\n\n\n
      6. [ICCAD’24<\/strong>] V. A. Chhabria, B.-Y. Wu, U. Sharma, K Kunal, A. Rovinsk, and S. S. Sapatnekar, \u201cGenerative Methods in EDA: Innovations in Dataset Generation and EDA Tool Assistants<\/a>,\u201d Proceedings of IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), 2024. (Invited paper)<\/li>\n\n\n\n
      7. [ICCAD’24<\/strong>] V. A. Chhabria, V. Gopalakrishnan, A. B. Kahng, S. Kundu, Z. Wang, B.-Y. Wu, D. Yoon, \u201cStrengthening the Foundations of IC Physical Design and ML EDA Research<\/a>,\u201d Proceedings of IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), 2024. (Invited paper)<\/li>\n\n\n\n
      8. [ICCAD’24<\/strong>] B.-Y. Wu, R. Liang, G. Pradipta, A. Agnesina, H. Ren, V. A. Chhabria, \u201c2024 ICCAD CAD Contest Problem C: Scalable Logic Gate Sizing using ML Techniques and GPU Acceleration,<\/a>\u201d Proceedings of IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), 2024. (Invited paper)<\/li>\n\n\n\n
      9. [MLCAD’24]<\/strong> W. Jiang, V. A. Chhabria, and S. S. Sapatnekar, “IR-Aware ECO Timing Optimization Using Reinforcement Learning<\/a>,” ACM\/IEEE International Symposium on Machine Learning for CAD (MLCAD), 2024. (Best paper nominated).<\/li>\n\n\n\n
      10. [MLCAD’24]<\/strong> U. Sharma, B.-Y. Wu, S. R. D. Kankipati, V. A. Chhabria, and A. Rovinski, \u201cOpenROAD-Assistant: An Open-Source Large Language Model for Physical Design Tasks<\/a>,\u201d ACM\/IEEE International Symposium on Machine Learning for CAD (MLCAD), 2024.<\/li>\n\n\n\n
      11. [ISLPED’24]<\/strong> V. Gopalakrishnan, B.-Y. Wu, and V. A. Chhabria, \u201cML-INSIGHT: Machine Learning for Inrush Current Prediction and Power Switch Network Improvement,<\/a>\u201d Proceedings of ACM\/IEEE International Symposium on Low Power Electronics and Design (ISPLED), <\/em>2024.<\/li>\n\n\n\n
      12. [LAD’24]<\/strong> B.-Y. Wu, U. Sharma, S. R. D. Kankipati, A. Yadav, B. K. George, S. R. Guntupalli, A. Rovinski, and V. A. Chhabria, \u201cEDA-Corpus: A Large Language Model Dataset for Enhanced Interaction with OpenROAD<\/a>,\u201d Proceeding of <\/em>IEEE International Workshop on LLM-Aided Design (LAD), 2024. (Best paper nominated).<\/strong><\/li>\n\n\n\n
      13. [VTS’24]<\/strong> V. A. Chhabria, W. Jiang, A. B. Kahng, R. Liang, H. Ren, S. S. Sapatnekar, and B.-Y. Wu, \u201cOpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education,<\/a>\u201d Proceedings of the IEEE VLSI Test Symposium (VTS)<\/em>, 2024.<\/li>\n\n\n\n
      14. [DAC’24]<\/strong> C. C. Sudarshan, Aman Arora, and  V. A. Chhabria, “GreenFPGA: Evaluating FPGAs as Environmentally Sustainable Computing Solutions<\/a>, “Proceedings of ACM\/IEEE Design Automation Conference (DAC), 2024.<\/li>\n\n\n\n
      15. [HPCA’24]<\/strong> C. C. Sudarshan, N. Matkar, S. Vrudhula, S. S. Sapatnekar, and V. A. Chhabria “ECO-CHIP: Estimation of Carbon Footprint of Chiplet-based Architectures for Sustainable VLSI,<\/a>” Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024.<\/li>\n\n\n\n
      16. [ASP-DAC’24]<\/strong> Z. Wang, J. Sun, A. Goksoy, S. K. Mandal, Y. Liu, JS Seo, C. Chakrabarti, U. Y. Ogras, V. A. Chhabria, J. Zhang, and Y. Cao “Exploiting 2.5 D\/3D Heterogeneous Integration for AI Computing<\/a>,” Proceedings of the IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), 2024.<\/li>\n\n\n\n
      17. [ASICON’23]<\/strong> Z. Wang, J. Sun, A. Goksoy, S.K. Mandal, JS Seo, C. Chakrabarti, U. Y. Ogras, V. A. Chhabria, and Y. Cao. “Benchmarking Heterogeneous Integration with 2.5 D\/3D Interconnect Modeling<\/a>, ” Proceedings of the <\/em>International Conference on ASIC (ASICON), 2023.<\/li>\n\n\n\n
      18. [ISPD’23]<\/strong> N. Evmorfopoulos, M. A. A. Shohel, Olympia Axelou, Pavlos Stoikos, V. A. Chhabria, and S. S. Sapatnekar, “Recent Progress in the Analysis of Electromigration and Stress Migration in Large Multisegment Interconnects,<\/a>” Proceedings of the International Symposium on Physical Design (ISPD), 2023.<\/li>\n\n\n\n
      19. [ICCAD’23]<\/strong> G. S. P. Kadagala, and V. A. Chhabria, “ICCAD CAD Contest Problem C: Static IR Drop Estimation Using Machine Learning,<\/a>” Proceedings of IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), 2023.<\/li>\n\n\n\n
      20. [ICCAD’23]<\/strong> M. A. A. Shohel, V. A. Chhabria, Nestor Evmorfopoulos, and S. S. Sapatnekar, “Frequency-Domain Transient Electromigration Analysis Using Circuit Theory<\/a>,” Proceedings of IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), 2023.<\/li>\n\n\n\n
      21. [ICCAD’23]<\/strong> Rongjian Liang, Anthony Agnesina, G. Pradipta, V. A. Chhabria, and H. Ren, “CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization,<\/a>” Proceedings of IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), 2023.<\/li>\n\n\n\n
      22. [ISQED’23]<\/strong> V. A. Chhabria and S. Sapatnekar, “Analysis of Pattern-dependent Rapid Thermal Annealing Effects on SRAM Design,<\/a>” Proceedings of IEEE International Symposium on Quality Electronic Design (ISQED), 2023.<\/li>\n\n\n\n
      23. [MLCAD’22]<\/strong> V. A. Chhabria, W. Jiang, A. B. Kahng, and S. Sapatnekar, “From Global Route to Detailed Route: ML for Fast and Accurate Wire Parasitics and Timing Prediction<\/a>,” Proceedings of ACM\/IEEE Workshop on Machine Learning for CAD (MLCAD), 2022.<\/li>\n\n\n\n
      24. [MLCAD’22] <\/strong>V. A. Chhabria, B. Keller, Y. Zhang, S. Vollola, S. Pratty, H. Ren, and B. Khailany, “XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine Learning<\/a>,” Proceedings of ACM\/IEEE Workshop on Machine Learning for CAD (MLCAD), 2022.<\/li>\n\n\n\n
      25. [ICCAD’21]<\/strong> V. A. Chhabria, K.Kunal, M. Zabihi, and S. S. Sapatnekar, “BeGAN: Power Grid Benchmark Generation Using a Process-portable GAN-based Methodology<\/a>,” Proceedings of IEEE\/ACM International Conference On Computer Aided Design (ICCAD), 2021.<\/li>\n\n\n\n
      26. [ICCAD’21]<\/strong> M. A. A. Shohel, V. A. Chhabria, Nestor Evmorfopoulos, and S. S. Sapatnekar, “Analytical Modeling of Transient Electromigration Stress based on Boundary Reflections<\/a>,” Proceedings of IEEE\/ACM International Conference On Computer Aided Design (ICCAD), 2021 (Best Paper Award).<\/li>\n\n\n\n
      27. [DAC’21]<\/strong> M. A. A. Shohel, V. A. Chhabria, and S. S. Sapatnekar, “A New, Computationally Efficient “Blech Criterion” for Immortality in General Interconnects<\/a>,” Proceedings of ACM\/IEEE Design Automation Conference (DAC), 2021.<\/li>\n\n\n\n
      28. [DATE’21]<\/strong> V. A. Chhabria, Y. Zhang, H. Ren, B. Keller, B. Khailany, and S. S. Sapatnekar, “MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification,<\/a>” Proceedings of Design, Automation, and Test in Europe (DATE), 2021.<\/li>\n\n\n\n
      29. [ASP-DAC’21]<\/strong> V. A. Chhabria, V. Ahuja, A. Prabhu, N. Patil, P. Jain, and S. S. Sapatnekar, “Thermal and IR Drop Analysis Using Convolutional Encoder-Decoder Networks,<\/a>” Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 2021.<\/li>\n\n\n\n
      30. [ASP-DAC’20]<\/strong> V. A. Chhabria, A. B Kahng, M. Kim, U. Mallappa, S. S. Sapatnekar, and B. Xu, “Template-based PDN Synthesis in Floorplan and Placement Using Classifier and CNN Techniques,<\/a>” Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 2020.<\/li>\n\n\n\n
      31. [ISQED’19]<\/strong> V. A. Chhabria and S. S. Sapatnekar, “Impact of Self-heating on Performance and Reliability in FinFET and GAAFET Designs,<\/a>” Proceedings of IEEE International Symposium on Quality Electronic Design (ISQED), 2019.<\/li>\n\n\n\n
      32. [DAC’19]<\/strong> T. Ajayi, V. A. Chhabria, M. Fogac\u00b8a, S. Hashemi, A. Hosny, A. B. Kahng, M. Kim, J. Lee, U. Mallappa, M. Neseem, G. Pradipta, S. Reda, M. Saligane, S. S. Sapatnekar, C. Sechen, M. Shalan,W. Swartz, L.Wang, Z.Wang, M. Woo, and B. Xu, “INVITED: Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project<\/a>,” Proceedings of ACM\/IEEE Design Automation Conference (DAC), 2019.<\/li>\n\n\n\n
      33. [GOMACTECH’19]<\/strong> T. Ajayi, D. Blaauw, T.-B. Chan, C.-K. Cheng, V. A. Chhabria, D. K. Choo, M. Coltella, S. Dobre, R. Dreslinski, M. Fogac\u00b8a, S. Hashemi, A. Hosny, A. B. Kahng, M. Kim, J. Li, Z. Liang, U. Mallappa, P. Penzes, G. Pradipta, S. Reda, A. Rovinski, K. Samadi, S. S. Sapatnekar, L. Saul, C. Sechen, V. Srinivas, W. Swartz, D. Sylvester, D. Urquhart, L. Wang, M. Woo, and B. Xu, “OpenROAD: Toward a Self-Driving, Open-Source Digital Layout Implementation Tool Chain”, Proceedings of Government Microcircuit Applications and Critical Technology Conference (GOMACTECH), 2019.<\/li>\n<\/ol>\n\n\n\n

        Archived<\/h3>\n\n\n\n
          \n
        1. M. A. A. Shohel, V. A. Chhabria, and S. S. Sapatnekar, “A Linear-Time Algorithm for Steady-State Analysis of Electromigration in General Interconnects,<\/a>” arXiv:2112.13451 [cs.AR], 2022.<\/li>\n\n\n\n
        2. V. A. Chhabria, Y. Zhang, H. Ren, B. Keller, B. Khailany and S. S. Sapatnekar, “MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification,<\/a>” arXiv:2012.10597 [cs.AR], 2021.<\/li>\n<\/ol>\n\n\n\n

          Patents<\/h3>\n\n\n\n
            \n
          1. V. A. Chhabria, B. A. Keller, Y. Zhang, B. Khailany, and H. Ren, \u201dReducing Crosstalk Pessimism using GPU-accelerated Gate Simulation and Machine Learning,\u201d US Patent App. 17\/540,167, 2023.<\/li>\n\n\n\n
          2. V. A. Chhabria, Y. Zhang, H. Ren, and B. Khailany, \u201dDetermining IR Drop using ML,\u201d U.S. Patent App. 17\/211,695, 2022.<\/li>\n<\/ol>\n","protected":false},"excerpt":{"rendered":"

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