{"id":304,"date":"2024-01-28T23:24:22","date_gmt":"2024-01-29T06:24:22","guid":{"rendered":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/?page_id=304"},"modified":"2024-01-28T23:25:42","modified_gmt":"2024-01-29T06:25:42","slug":"lab-openings","status":"publish","type":"page","link":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/lab-openings\/","title":{"rendered":"Lab Openings"},"content":{"rendered":"\n

Our research group has three openings for self-motivated Ph.D. students in the following areas. If you are interested, please email<\/a> your CV, transcript and research interests.<\/p>\n\n\n\n

1. Developing EDA Tools <\/strong>to Enable Heterogenous Integration (HI)<\/h4>\n\n\n\n

Position Description: <\/strong>
The position will involve the development of:<\/p>\n\n\n\n

    \n
  • Electronic design automation (EDA) algorithms for the design of HI-based (2.5D and 3D) systems <\/li>\n\n\n\n
  • EDA tools for SoC disaggregation and pathfinding <\/li>\n\n\n\n
  • EDA tools for thermal and power analysis of 2.5D and 3D architectures<\/li>\n<\/ul>\n\n\n\n

    Minimum student qualifications:<\/strong><\/p>\n\n\n\n

      \n
    • Strong C\/C++ programming skills<\/li>\n\n\n\n
    • Motivation to read research papers to understand state-of-the-art models and challenges<\/li>\n\n\n\n
    • Basic knowledge of algorithms and data structure<\/li>\n\n\n\n
    • Basic knowledge of VLSI design using chiplets<\/li>\n<\/ul>\n\n\n\n

      2. Developing EDA Tools for Environmentally Sustainable Computing<\/strong><\/h4>\n\n\n\n

      Position Description: <\/strong>
      The position will involve the development of:<\/p>\n\n\n\n

        \n
      • Models to estimate carbon footprint for different design technologies.<\/li>\n\n\n\n
      • Electronic design automation (EDA) algorithms that analyze and optimize large-scale systems for carbon footprint<\/li>\n\n\n\n
      • Sustainability-centric design techniques for VLSI systems<\/li>\n<\/ul>\n\n\n\n

        Minimum student qualifications:<\/strong><\/p>\n\n\n\n

          \n
        • Strong Python programming<\/li>\n\n\n\n
        • Motivation to read research papers to understand state-of-the-art models in designing chips for environmental sustainability <\/li>\n\n\n\n
        • Basic knowledge of the VLSI design flow<\/li>\n<\/ul>\n\n\n\n

          3. Developing ML-based EDA tools<\/strong><\/h4>\n\n\n\n

          Position Description: <\/strong>
          The position will involve the development of:<\/p>\n\n\n\n

            \n
          • Machine learning models for physical design problems (timing analysis, power, thermal, place and route)<\/li>\n\n\n\n
          • ML-EDA research infrastructure and open-source development<\/li>\n\n\n\n
          • Large-language models to assist chip design<\/li>\n\n\n\n
          • Reinforcement learning algorithms for chip design<\/li>\n<\/ul>\n\n\n\n

            Minimum student qualifications:<\/strong><\/p>\n\n\n\n

              \n
            • Strong Python and C\/C++ programming<\/li>\n\n\n\n
            • Motivation to read research papers to understand state-of-the-art algorithms in EDA<\/li>\n\n\n\n
            • Basic knowledge of the VLSI design flow<\/li>\n\n\n\n
            • Basic knowledge of machine learning <\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"

              Our research group has three openings for self-motivated Ph.D. students in the following areas. If you are interested, please email your CV, transcript and research interests. 1. Developing EDA Tools to Enable Heterogenous Integration (HI) Position Description: The position will involve the development of: Minimum student qualifications: 2. Developing EDA Tools for Environmentally Sustainable Computing Position…<\/p>\n","protected":false},"author":202,"featured_media":0,"parent":0,"menu_order":1,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":""},"class_list":["post-304","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/wp-json\/wp\/v2\/pages\/304","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/wp-json\/wp\/v2\/users\/202"}],"replies":[{"embeddable":true,"href":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/wp-json\/wp\/v2\/comments?post=304"}],"version-history":[{"count":0,"href":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/wp-json\/wp\/v2\/pages\/304\/revisions"}],"wp:attachment":[{"href":"https:\/\/faculty.engineering.asu.edu\/vidyachhabria\/wp-json\/wp\/v2\/media?parent=304"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}