VLSI design automation research
Our research develops electronic design automation tools and computer-aided design techniques for VLSI systems across three areas.
Thrust 01
AI for Chip Design
Chip design remains slow and labor-intensive even as chips grow more complex. We build AI that designs chips: machine-learning models and LLM-based agents that automate and optimize the design process itself.
Topics: ML for EDA: prediction models for IR drop, thermal analysis, timing, parasitics, crosstalk, and inrush current. LLM for chip design: assistants and agents for physical design tasks, including OpenROAD-Assistant, OpenROAD Agent, VPR-Evolve, EvoDRC, CHICO-Agent, and ResizerAgent.
Thrust 01 · AI for Chip Design
Agentic physical design
Intelligent assistants and self-correcting agents, OpenROAD-Assistant, OpenROAD Agent, and ResizerAgent, that help designers work with OpenROAD and automatically select timing-optimization strategies.
- ResizerAgent: Agentic Strategy Selection for Timing Optimization in OpenROAD Resizer · MLCAD 2026
Thrust 01 · AI for Chip Design
LLM-driven algorithm evolution
Multi-agent LLM frameworks that discover and evolve stronger placement, routing, and DRC-repair algorithms, including VPR-Evolve, GR-Evolve, and EvoDRC.
- GR-Evolve: Design-Adaptive Global Routing via LLM-Driven Algorithm Evolution · arXiv 2026
- VPR-Evolve: Multi-Agent-Driven Algorithm Evolution for FPGA Place and Route · ASP-DAC 2027
Thrust 02
Infrastructure for AI for EDA
ML for EDA research is held back by scarce datasets and incompatible data formats, making results hard to reproduce and compare. We build the shared datasets, formats, and standards the field needs.
Topics: Shared datasets: EDA Corpus, CarbonSet, MIMIC, and DALI-PD. Common formats and infrastructure: ML EDA Commons, CircuitOps, and the IEEE DATC RDF ecosystem.
Thrust 02 · Infrastructure for AI for EDA
ML infrastructure for EDA
The shared infrastructure behind ML for EDA: CircuitOps for generative circuit optimization, and the ML EDA Commons for standards, data formats, and reproducible research.
- CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization · ICCAD 2023
- Toward an ML EDA Commons: Establishing Standards, Accessibility, and Reproducibility in ML-Driven EDA Research · ISPD 2025
Thrust 02 · Infrastructure for AI for EDA
Open datasets for EDA
Curated public datasets, EDA Corpus, CarbonSet, MIMIC, and DALI-PD, that make ML-for-EDA research accessible, comparable, and reproducible.
- CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUs · GLSVLSI 2025
Thrust 03
EDA for Heterogeneous Integration
As transistor scaling slows, 2.5D and 3D integration carries progress forward, but it brings new challenges in thermal management, sustainability, and design complexity. We build the automation to design these systems.
Topics: Sustainable computing: carbon-aware design and evaluation of chiplets and FPGAs. Thermal analysis: analytical and graph-learning models for multi-stack chiplet systems. Pathfinding: carbon-aware pathfinding and architecture optimization for chiplet-based AI systems.
Thrust 03 · EDA for Heterogeneous Integration
Sustainable chiplet computing
Quantifying and optimizing the carbon footprint of chiplet-based architectures and FPGAs, from carbon-aware pathfinding to system-level sustainability evaluation.
- ECO-CHIP: Estimation of Carbon Footprint of Chiplet-Based Architectures for Sustainable VLSI · HPCA 2024
- CarbonPATH: Carbon-Aware Pathfinding and Architecture Optimization for Chiplet-Based AI Systems · arXiv 2026
Thrust 03 · EDA for Heterogeneous Integration
Thermal and cross-layer co-optimization
Modeling and optimizing heat flow, power, and resources across 2.5D and 3D chiplet stacks with analytical models, graph learning, and LLM agents.
- CHICO-Agent: An LLM Agent for the Cross-Layer Optimization of 2.5D and 3D Chiplet-Based Systems · ICLAD 2026